Compact and efficient dc-links have become practical thanks partly to ceramic capacitor designs that excel at thermal stability and feature low parasitic inductance.
EPCOS, a TDK Group Company
The technology behind capacitors has been around since late 1745 when a German physicist found that an electrical charge could be stored by connecting a high-voltage electrostatic generator by a wire to a volume of water in a hand-held glass jar. Although different materials have been used over the years – from glass to paper to ceramics – it wasn’t until the 1950s that Bell Labs developed a more reliable and miniaturized low-voltage support capacitor to complement their newly invented transistor. Since then, the technology has not changed significantly until this century.
Developments in power electronics have forced capacitor technology to advance in terms of better reliability, more efficiency and miniaturization. New dc capacitor technology offers significant advantages over conventional capacitor technologies when it comes to stabilizing and filtering the dc-link circuits of power inverters.
New dc capacitors are particularly aimed at developers of topologies with new fast-switching IGBT modules. But these capacitors can make possible innovative power electronic designs thanks to their low-inductive design and their ability to work at high temperatures and power densities.
During semiconductor switching, dc-link capacitors are part of the commutation loop, which in turn, affects the entire behavior of the design. Historically, power electronic designs have utilized assemblies of semiconductors and dc-link capacitors to minimize voltage overshoot. Recently, capacitors with high capacitance density and a low self-inductance have been developed to make possible commutation loops also having a low inductance.
In addition, it is crucial to minimize voltage ripple on the dc link to avoid electrical stress and comply with EMI requirements. New capacitor technology accomplishes this by balancing the difference between the input source and the output load.
The primary function of dc-link capacitors is to provide energy storage during hold up time. But additionally, they are often needed to allow fast and efficient switching of semiconductors by minimizing the required area. Consequently, the size of the dc-link capacitor determines the packaging for a motor inverter. It’s possible to create a compact or miniaturized dc-link by optimizing the package with a high-current, low-self-inductance connection point.
The latest ceramic capacitor technology uses a dielectric material comprised of lead-lanthanum-zirconate-titanate ceramic (PLZT). The PLZT overcomes the fact that capacitance decreases with voltage in ferroelectric class 2 ceramic materials. PLZT ceramic is optimized for the antiferroelectric state of the capacitor so capacitance increases with voltage rather than decreases. This results in the highest capacitance values at dc-bus voltage levels and better capacitance density at operating voltage levels. It also reduces the equivalent series resistance (ESR) providing efficient operation at high temperatures up to 150°C and high switching frequencies up to several megahertz.
Electrical and thermal conductivity directly impacts the properties of the capacitor, so the material and design of inner electrodes greatly affects capacitor performance. The use of copper as an inner electrode material allows for more compact and efficient design. It also minimizes electrical resistivity over a wide range of temperatures and frequencies. In compact designs, any additional self-heating of the capacitor and its connection needs to be prevented, and the use of copper helps to address this.
The temperature and thermal resistance of a dc-link capacitor are important factors in its efficiency and will define and predict the maximum permissible current. Heat in a capacitor depends on the ESR and ripple current. It must be conducted away efficiently for capacitors with high current ratings.
Even without a heat sink or any forced air flow across the capacitor, high current ratings can be reached through use of state-of-the-art electronic printed circuit boards (PCB) which provide enough thermal conductivity to operate the capacitor at high ripple currents. Simple forced cooling can further boost the maximum permissible current by about 25%.
Some dc-link capacitors, like the TDK CeraLink, can have high current ratings of more than 1 A/µF and exceed capacitance density and current per capacitor volume of many ceramic-based capacitors. While each capacitor technology has different benefits and drawbacks, but ceramic capacitors are the only technology which combines both high capacitance density and high current rating. Aluminum electrolytic capacitors offer high capacitance density which makes them economical when there is no need for high current ratings per capacitance. Film capacitors may offer good ratings, but they have low capacitance density and perform about the same as aluminum electrolytic capacitors in terms of permissible ripple current per capacitor volume.
Capacitor technologies also differ in their thermal robustness. As a general rule, the leakage current of dielectric materials rises with temperature.
The most widely-used model for predicting capacitor lifetime refers to the voltage and temperature stress of capacitors. Lifetimes can be gauged through tests at increased voltage and temperature levels. Tests of different ceramic capacitors of the same capacitance, voltage and temperature rating show that MLCC capacitors break down early – within tens of minutes. In one recent test all MLCC capacitors failed within 50 minutes, whereas only four out of 30 PLZT-based ceramic capacitors failed during the same time frame.
In parallel connections of capacitors, the temperature dependency of the capacitance is particularly crucial. Capacitance drops as temperature rises. If paralleled capacitors each see slightly different temperatures, the capacitor with the highest temperature will have the highest capacitance. It will also have the lowest impedance and highest current, increasing the risk of a thermal runaway. High capacitance values are needed at low temperatures, especially in automotive and industry applications that require “cold starts.”
Use of dc-link capacitors that employ a negative capacitance characteristic at high temperatures helps to minimize the risk of thermal runaway even when rated temperatures are exceeded. In this model, the hottest capacitor faces the lowest current, providing a stable and self-regulating system against thermal gradients.
Capacitor performance in one area, until recently, has fallen short: resistance to the mechanical and the thermo-mechanical stress during transport, mounting and operation.
Ceramic materials tend to fail because of cracking from solder shock or because of mechanical overload caused by the bending of the PCB. Incorporating lead frames into the capacitor design can reduce forces on the ceramic from mechanically induced stress. Most MLCCs employ a metallic cap on the outer termination to provide a solderable connection. However, temperature shocks from soldering causes cracks in the ceramic that start at the end of the cap and go through the isolation zone into the active area of the ceramic. These cracks can be prevented by omitting the cap and connecting the outer electrode on two opposing surfaces on the ceramic chip.