Designing next-generation interfaces is all about transmitting more data at higher speeds. The ever-growing need for bandwidth is creating new applications where chips and connectors must offer major speed improvements while maintaining acceptable performance characteristics and managing higher system operating temperatures.
The need for speed is leading the evolution in system design including expanded use of PAM4 modulation, maintaining signal integrity at high speeds, and developing connectors with features and capabilities tailored to high-speed operations.
For example, NRZ signaling has long been an industry standard, but the use of PAM4 modulation is growing due to its ability to process data rates of 56 Gbps, 100 Gbps, and higher. PAM4 offers major speed improvements compared to NRZ methodologies, but the downside is data must be encoded before it is transmitted, then de-encoded when received. This requires additional processing capability. However, in a growing number of PAM4 applications, the additional speed capability outweighs the higher processing costs.
Despite the move to PAM4, NRZ is still a viable alternative for some high-speed applications. As a result, backplane connectors have been developed that can provide data rates above 50 Gbps in both PAM4 and NRZ designs. These backplanes optimize signal integrity performance and improve insertion loss compared to in-line beams, pushing interface resonance frequency past 30 GHz.
These speed-enhanced backplanes must protect against the impedance discontinuities, increased crosstalk, and higher EMI that occur with higher data speeds. It is also important for these backplanes to be backward compatible (working with existing headers) so they can be integrated into existing designs. For example, when enhancements are made only to the daughtercard, the same headers can be used.
As system speeds increase, maintaining signal integrity can be challenging. One alternative is to take high-speed signals out of the PCB by using high-speed copper cable. New technology has allowed this alternative to be used with both 50 Gbps NRZ and 50 Gbps PAM4 live, encoded serial traffic using QSFP cable assemblies, and connector interfaces.
Another issue with high-speed connections is the added heat they produce. For example, stacked connectors can deliver higher speed, but they use more power—about 4.5 to 5 W in 100 Gbps and produce more heat than standard interconnects.
Temperatures typically have to be maintained below 70°C in the module and below a 45°C ambient temperature in the enclosure. As a result, new approaches to thermal management can be required. One option is to use internal riding heat sinks and cages specially designed for optimized air flow, which can produce a 9°C reduction in module temperature. The next generation of modules is expected to support at least 7 W, making thermal control strategies such as this one even more important.
One more approach to designing new interfaces is utilizing high-speed mezzanine systems that offer architects more design flexibility. One such system was recently demonstrated in operation with test equipment and software. The modular system—with tunable differential pairs, low stack heights and compliant-pin terminations with a staggered interface configuration—offers data rates up to 28 Gbps. That makes it ideal for space-constrained telecom, automation, and medical applications that demand higher speeds and smaller form factors.
Also, PCBs sometimes must be reused or reworked. Traditional SMT connectors used in mezzanine systems are permanently affixed, making it virtually impossible to reuse PCBs. When an SMT termination fails, attempting to rework it creates a short. As an alternative, press-fit mezzanine connectors would allow reuse but typically offer lower signal integrity. New technology solves this problem by providing compliant-pin termination while minimizing near-end and far-end crosstalk, matching the signal integrity of SMT connectors. Moreover, the compliant pin allows designers to rework the board and maximize system utility without sacrificing signal integrity.
Finally, new design tools are being developed that can dramatically reduce the time required to simulate system design. Traditional manual simulation, in which each component is simulated independently, can require up to a week or two to simulate an individual design. New software-based approaches use a library of pre-simulated models based on standard designs, materials, traces, and vias. Designers select the models they want and get the results nearly instantaneously. The software allows a first-order approximation of the system, providing designers with a valuable head start on developing a new system. As time to market becomes more important, tools like these will help designers develop their products more rapidly.
Now and in the future, new interconnect solutions must meet the demand for increased network bandwidth and advanced technology. Products must be capable of supporting a wide range of data rates in multiple connector sizes and shapes. These solutions must also meet the industry’s most stringent high-speed performance requirements while providing the flexibility and scalability required for next-generation system architectures.