Valtrix Technologies, an EDA company delivering Design Verification (DV) solutions for the semiconductor industry, announced that Esperanto Technologies has selected Valtrix’s STING DV Platform for design verification of its energy-efficient semiconductor solutions for artificial intelligence (AI) and machine learning (ML) based on the open standard RISC-V instruction set architecture. Esperanto plans to use STING for verifying the architectural compliance and functional correctness of its 7nm AI Supercomputer-on-Chip based on the high-performance ET-Maxion and energy efficient ET-Minion microarchitectures.
“Design verification is a critical aspect for any SoC design, but particularly one with more than a thousand processor cores on a chip,” said Dave Ditzel, president and CEO of Esperanto Technologies. “Esperanto selected STING from Valtrix based on its unique design verification capabilities. The capabilities of the STING design verification platform, plus Valtrix’s prior experience with RISC-V gave us the additional functionality we were looking for,” continued Ditzel.
Shubhodeep Roy Choudhury, CEO of Valtrix, added: “Esperanto is at the forefront of the RISC-V revolution, developing a leading edge solution for advanced AI/ML applications. We are very proud and excited to be partnering with Esperanto to achieve their mission of developing an AI Supercomputer on a Chip.”
STING, a highly versatile design verification tool developed by Valtrix Technologies, can be used to generate and execute different testing workloads (directed/random/algorithmic) on a device-under-test for verifying architectural compliance and testing its functionalities. The test methodology enables portability of stimulus across simulations, in-circuit emulation, FPGA and silicon resulting into a high degree of verification reuse and efficiency.
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