GOWIN Semiconductor Corp. announces the release of GOWIN’s new EDA tool, YunYuan 1.9. With the release of this new toolchain, GOWIN will enable enhanced features and performance capabilities on their current and future FPGA product families.
EDA toolchains are becoming increasingly complex as FPGA applications are integrating more functions for the cloud and endpoint markets. To enable this complexity change, the new toolchain will include Gowin Synthesis, an enhanced front end logic synthesis tool designed and developed by the GOWIN EDA software team. It’s a significant milestone for GOWIN as the total toolchain is now completely designed in-house, allowing for quick quality improvements as well as product updates for customers time to market requirements. While GOWIN’s FPGA’s will be more optimized for IP, performance, and utilization using the new Yun Yuan 1.9 toolchain, the toolchain will additionally support the current Synopsys Synplify Pro synthesis tool already integrated.
GOWIN EDA (YunYuan) is an easy-to-use integrated design environment, providing design engineers with a one-stop solution. The complete GUI based environment covers FPGA design entry, code synthesis, place & route, bitstream generation, download, and online debugging of GOWIN FPGA’s on customer’s boards. The new toolchain also incorporates the following updated IP blocks:
- CAN2.0 & CAN-FD IP
- High-Speed MIPI Interface (1:8 & 1:16 Gear Box)
- Ethernet 10/100/1000Mhz MAC Controller & Interface to MII/RMII/GMII
- pSRAM Controller IP
- Configurable RISC-V (5-Stage-Pipeline) CPU & System IP
- NLMS Filter
- FDAF – Frequency Domain Adaptive Filter