Muxed SAR ADCs equipped with high-impedance technology can substantially reduce circuit footprint and energy use without compromising performance and accuracy.
Sanjay Rajasekhar, Arvind Shankar • Analog Devices Inc.
Muxed successive approximation register analog-to-digital converters (SAR ADCs) find use in applications that must constantly monitor multiple critical variables. In optical communications, laser biasing could be monitored via optical power measurement, while in vital signs measurements, EEG/ECG signals from electrodes could be monitored.
Muxed applications have some common requirements. Specifically, there are many channels to monitor. Generally, the ADC sequences through all the channels. The channel voltages are generally uncorrelated with each other, and there are tight constraints on the system-level footprint and power.
These requirements lead to some challenges. As the ADC finishes a conversion on one channel, the sampling capacitor within the ADC charges to the voltage of the channel. If the sampling capacitor voltage differs substantially from the voltage of the channel next in sequence, the signal chain must be designed to settle the sampling capacitor to the new voltage accurately, within the allowed acquisition time. Traditionally, the solution to this problem has been to use a wideband driver amplifier, coupled with an RC filter.
The sensor could generate a voltage or a current, and the sensor interface circuit could be an instrumentation amplifier or a trans-impedance amplifier, respectively. The capacitor is normally an NP0/C0G type, as other types can cause significant distortion. NP0 capacitors have high linearity but low density.
The NP0 capacitor is also chosen to be much larger in value than the ADC internal sampling capacitor. It performs two critical functions: Reduce the kickback from the ADC sampling capacitor, and reduce the wideband noise of the signal chain by filtering the noise beyond the required settling bandwidth.
In the traditional signal chain, the designer is forced to use a driver amplifier and a large capacitor for channel. Each driver amplifier could consume anywhere between tenths of a milliamp to a few milliamps. Each capacitor, including clearances, could take up around 1 mm2 of the board area. Replicating this signal chain over many channels significantly boosts system footprint and power consumption. This constitutes one of the major problems in muxed SAR ADC applications today.
Input high-Z technology?
The term high-Z technology, in the context of analog input, refers to a collection of circuit techniques that—without consuming static or continuous power—substantially boost the effective input impedance of the ADC. This makes the input of the ADC easy to drive.
Let’s assume the muxed ADC is converting on Channel N – 1 and that the next channel to be converted is Channel N. At the rising edge of convert start (CNV), the channel voltage is sampled. The ADC then converts the sampled voltage on Channel N – 1. After the conversion, with the input high-Z disabled, the ADC proceeds to acquire the next channel in the sequence, which is Channel N.
The voltage on Channel N can often be substantially different from the voltage on Channel N – 1, to which the ADC capacitor is now charged. This results in a huge voltage kick on Channel N and introduces a large error in the channel voltage at the sampling instant (second rising edge of CNV). To avoid the voltage kick, a large external capacitor must absorb the kick and a driver amplifier must supply the necessary charge.
When the input high-Z is enabled, the internal sampling capacitor of the ADC charges up to the voltage on the channel it is going to acquire before the real acquisition begins. Immediately following the conversion on Channel N – 1, a high-Z phase is introduced that accurately charges the ADC sampling capacitor to the present voltage on Channel N. With the capacitor charged, the ADC sampling capacitor doesn’t source any charge and doesn’t result in any kickback when it connects to the external input. In practice, there is usually a small residual error caused by the charge injection of the internal switches (first charge kick). This small residual error results in practically negligible settling error at the sampling instant of Channel N. This charge error with the high-Z enabled would enable a massive improvement in the settling dynamics of the system.
When the sampling on Channel N finishes, the ADC must proceed to do the conversion. So the internal switches disconnect the ADC sampling capacitor from the external input. This results in a second charge kick from the switch opening charge injection. Typically, the second charge kick takes longer to settle, so the magnitude of the first charge kick determines the channel settling error. Thus it is the size of the first charge kick that must be minimized.
The AD4696 latest-generation muxed SAR ADC incorporates input high-Z technology as part of the EasyDrive feature set. As a result, the AD4696 begins acquisition on a channel smoothly. It eliminates the need for a kickback absorption capacitor and a driver amplifier for each channel. The result is a massive reduction of the system footprint and power consumption, as well as a significant simplification of the signal chain.
An important advantage of the input high-Z implemented in the AD4696 family is that the circuits performing the high-Z function can all be power-cycled at the rate of the conversion. So, the power consumption of the high-Z function scales linearly with the throughput of the ADC, just like the core SAR ADC itself. This offers remarkable flexibility compared to the traditional, rather rigid signal chain designs.
The input high-Z function is also built into the LTspice model of the AD4696. The first and second charge kicks are accurately modeled, enabling reliable simulation of the settling artifacts for signal chain designs.
Recall that the NP0 capacitor also provides wideband noise filtering of the signal chain. If we eliminate the capacitor, we must find other ways to filter the noise. One way is to boost the external series resistance. The AD4696 has a 60 pF internal capacitor in series with a 240 Ω typical internal resistor. By setting the external resistor, we can tune the signal chain noise bandwidth to a desired value.
Without the NP0 capacitor, the external resistance plays an important role in the noise performance, linearity, and accuracy of the signal chain. A small value resistor can help settle sampling charge kicks quickly and thus improve linearity and accuracy. But the improved performance comes at the cost of more overall noise because of a higher effective noise bandwidth. Conversely, a large-value resistor filters noise better, but at the expense of degraded linearity and accuracy.
A big advantage of the high-Z technology in AD4696 is that it allows use of large-value resistors (for better noise filtering without degrading the linearity and accuracy. all parameters in the signal chain—noise, linearity, accuracy, power, and solution size.
Top, THD vs. number of channels in a sequence. Test tone: 1 kHz, –1 dbfs. Below, dc steady-state settling errors in LSBs at 16-bit level with and without the high-Z function.
Measurements have taken place with a 2-kΩ external resistor and without any NP0 capacitor. The results show a massive improvement in ac and dc performance with the analog input high-Z enabled. The experiment involves running the core ADC of the AD4696 at 1 MSPS but increasing the number of channels as part of a round-robin sequence. Data are collected on one channel, while the other channels in the sequence are provided with 0-V inputs.
As the channels are sequenced with the high-Z disabled, nonlinear settling errors arise because the sampling capacitor is not charged to the subsequent channel voltage. This results in significant distortion. With the high-Z enabled, there is a massive improvement in the distortion performance.
Now consider a test where the channel of interest is given a near-full-scale input and the other channels in the sequence are driven with 0 V. Conversions take place on the channel of interest while adding channels to the sequence, and the shift in the average output code from the expected code is plotted.
When operating the core ADC at lower throughputs than 1 MSPS, the user may need to further lower the effective signal chain noise bandwidth to limit the analog front-end noise aliasing. This would necessitate higher resistance values, and the high-Z function helps immensely with maintaining the performance under these conditions.
The input high-Z technology implemented in the AD4696 family of parts offers benefits for muxed SAR applications such as reduced system level power, smaller footprint, and fewer components, to name a few, while maintaining high ac performance and dc accuracy. It eliminates the need for a dedicated driver amplifier and a kickback absorption capacitor on each channel. The power consumption for the high-Z function itself scales with the throughput of the ADC, offering remarkable flexibility and versatility for system-level design.
The authors would like to thank Asif Ahmad, Peter Hurrell, and Tyler Schmitt for their contributions to this work.