Image recognition SoC integrates four 2-GHz cores

Optimum Semiconductor Technologies, Inc. announced the GP8300 image recognition SoC. The GP8300 dramatically reduces chip cost, area, and power consumption for image recognition and object detection in a broad range of products such as self-driving cars, autonomous vehicles, smart cameras and other IoT edge devices.

Created in 28nm technology, the GP8300 includes four 2GHz ‘Unity’ CPU cores from General Processor Technologies (GPT) interconnected with a cache coherent memory supporting Heterogeneous Systems Architecture (HSA) processing for a common programming framework. The GP8300 also integrates four of GPT’s new 2GHz Variable Length Vector DSP (VLVm1) cores for signal processing applications. Within the chip, the out-of-order CPUs execute control code while very long vectors process data. In addition to these generalized compute units, the chip also integrates two 1GHz AI accelerators from GPT.

“The GP8300 brings together several of GPT’s innovative IP cores with underlying embedded artificial intelligence (eAI) algorithms in a highly-integrated design targeting a wide range of exciting applications,” said Gary Nacer, President and COO of Optimum. “The new SoC is one of the first CNN accelerators in China, and it provides the right combination of high performance, low power consumption, and the cost efficiency that our customers need as they create innovative new products.”

Building on the success of OST’s innovative SB3500 multithreaded heterogeneous computing platform for low-power software defined radio (SDR), the GP8300 represents a new architecture that achieves deep integration of eAI, edge computing, and communications on a single chip. OST provides support for CaffeNet-based training and tools for automatic fixed-point conversion and compression for inference.