The world’s most advanced DRAM double data rate 5X (LPDDR5X) mobile memory delivers top speed grades of 8.5 gigabits (Gb) per second. The 1β node also delivers significant gains across performance, bit density, capacity and power efficiency that will have sweeping market benefits. Beyond mobile, 1β delivers the low-latency, low-power, high-performance DRAM that is essential to support highly responsive applications, real-time services, personalization and contextualization of experiences, across intelligent vehicles to data centers.
The world’s most advanced DRAM, 1β delivers around a 15% power efficiency improvement and more than a 35% bit density improvement1 with a 16Gb per die capacity.
“The launch of our 1-beta DRAM signals yet another leap forward for memory innovation, brought to life by our proprietary multi-patterning lithography in combination with leading-edge process technology and advanced materials capabilities,” said Scott DeBoer, executive vice president of technology and products at Micron. “In delivering the world’s most advanced DRAM with more bits per memory wafer than ever before, this node lays the foundation to usher in a new generation of intelligent, data-rich and energy-efficient technologies from the edge to the cloud.”
The mobile ecosystem will be the first to reap the benefits of 1β DRAM’s significant gains, which will usher in next-generation mobile innovation and advanced smartphone experiences. Due to 1β’s speed and capacity improvements, high-bandwidth use cases will become more responsive and smoother during downloads, launches and simultaneous use of data-hungry 5G and artificial intelligence (AI) applications. The increased performance of 1β-based LPDDR5X will not only enhance smartphone camera launch, night mode, portrait mode and pro mode photography with boosted speed and clarity, but it will enable shake-free, high-resolution 4K video recording and intuitive in-phone video editing.
The low power-per-bit consumption of 1β process technology delivers the most power-efficient memory technology on the market for smartphones. The power savings are also enabled by the implementation of new JEDEC enhanced dynamic voltage and frequency scaling extensions core (eDVFSC) techniques on this 1β-based LPDDR5X. The addition of eDVFSC at a doubled frequency tier of up to 3,200 megabits/sec provides improved power savings controls to enable more efficient use of power based off unique end user patterns.
Micron’s industry-first 1β node allows higher memory capacity in a smaller footprint — enabling lower cost per bit of data. DRAM scaling has largely been defined by this ability to deliver more and faster memory per square millimeter of semiconductor area, which requires shrinking the circuits to fit billions of memory cells on a chip roughly the size of a fingernail. With each process node, the semiconductor industry has been shrinking devices every year or two for decades; however, as chips have grown smaller, defining circuit patterns on wafers requires challenging the laws of physics.
While the industry has begun to shift to a new tool that uses extreme ultraviolet light to overcome these technical challenges, Micron has tapped into its proven leading-edge nanomanufacturing and lithography prowess to bypass this still emergent technology. Doing so involves applying the company’s proprietary, advanced multi-patterning techniques and immersion capabilities to pattern these miniscule features with the highest precision. The greater capacity delivered by this reduction will also enable devices with small form factors, such as smartphones and IoT devices, to fit more memory into compact footprints.
Micron Technology, Inc., 8000 South Federal Way, Boise, ID 83707-0006, www.micron.com/