Renesas Electronics Corporation announced the expansion of its RZ/V Series of microprocessors (MPUs) with the new RZ/V2L MPUs designed for entry-level AI-enabled applications. As part of the RZ/V Series, the new MPUs incorporates Renesas’ exclusive AI accelerator – the DRP-AI (Dynamically Reconfigurable Processor) – to make embedded AI easier and more power-efficient. The new RZ/V2L shares several features with its predecessor, the RZ/V2M, such as high-precision AI inference capabilities combined with top-class power efficiency. It also includes optimizations such as tailoring the DRP-AI operating frequency and memory interface for an entry-level MPU.
The DRP-AI provides both real-time AI inference and image processing functions with the capabilities essential for camera support such as color correction and noise reduction. This enables customers to develop AI-based vision applications, such as point-of-sale (POS) terminals and robot vacuum cleaners, without requiring an external image signal processor (ISP). In addition, the RZ/V2L’s excellent power efficiency eliminates the need for heat dissipation measures such as heat sinks or cooling fans. Now AI can be implemented cost-efficiently not only in surveillance cameras and industrial equipment but also in a wide range of applications including home appliances and consumer electronics.
The RZ/V2L is also package- and pin-compatible with the existing RZ/G2L general-purpose MPUs. This allows RZ/G2L users to easily upgrade to the RZ/V2L for additional AI functions without needing to modify the system configuration, keeping migration costs low.
As part of the RZ/V2L development environment, Renesas offers a complimentary DRP-AI Translator, a tool that automatically converts AI models into an executable format. The input format is the industry-standard Open Neural Network Exchange (ONNX). Developers can leverage the DRP-AI while using the tools they are accustomed to, allowing them to immediately start using the RZ/V2L to evaluate AI models based on proven learning data.
Key Features of the RZ/V2L MPUs include: 64-bit Arm Cortex-A55 (1.2 GHz, dual or single-core) and Cortex-M33; DRP-AI (1 TOPS/W class) AI accelerator capable of running the Tiny YOLOv2 program at 28 frames per second (fps); Simple ISP functions required for machine vision are provided in the DRP library (supports up to full HD); 16-bit, single-channel DDR memory interface; 3-D graphics functions (Arm Mali-G31 GPU); Video codec (H.264); CMOS sensor interfaces (MIPI-CSI and Parallel) for camera input; Display interfaces (MIPI-DSI and Parallel); Memory with error checking and correction (ECC); Verified Linux Package (VLP) based on Civil Infrastructure Platform Linux, an industrial-grade Linux implementation, available; Available in 15 mm square or 21 mm square BGA packages that are pin-compatible with the RZ/G2L;
As part of a series of comprehensive solutions for assisting rapid development called “Winning combinations,” Renesas offers solutions using mutually compatible devices that work together seamlessly for reduced design risk. RZ/V2L evaluation boards are provided as “SMARC (Smart Mobility ARChitecture) SoM (System-on-Module) Solution” to enable quick validation for different applications. “SMARC Solution” is also available for existing RZ/G2 MPUs. These reference designs provide an optimized circuit diagram and board layout and include a power supply circuit and timing tree. Furthermore, a power management IC (PMIC) optimized for the RZ/V2L is currently in development, and solutions incorporating the RZ/V2L and new PMIC are expected to become available in the second half of 2021. “Winning Combinations” is an engineering-vetted system architectural solution that combines Renesas’ expertise in analog, power, and embedded computing to help customers get to market faster.
Sample shipments of the RZ/V2L start today, and mass production is scheduled to begin in December 2021. The SMARC SoM Solution is available now.