Cadence Design Systems, Inc. entered the fast-growing system analysis and design market with the announcement of the Cadence Clarity 3D Solver, which delivers high accuracy with up to 10X faster simulation performance and unbounded capacity compared to legacy field solver technology. Harnessing state-of-the-art distributed multiprocessing technology, the Clarity 3D Solver efficiently tackles electromagnetic (EM) challenges […]
Chip design tools optimized for Arm Neoverse N1 platform in cloud-to-edge apps
Cadence Design Systems, Inc. announced that its tools and IP have been optimized to support the new Arm Neoverse N1 platform to accelerate the transformation of a scalable cloud-to-edge infrastructure. To ease adoption, Cadence delivered a 7nm full-flow digital implementation and signoff Rapid Adoption Kit (RAK), collaborated with Arm to ensure the Cadence Verification Suite […]
Analog Top Talks in November on EDABoard.com forums
Peer-to-peer, engineer-to-engineer questions and answers from the EDABoard.com engineering community around analog ICs and analog design. Click the “Read more” link and follow the entire conversation and maybe add your two cents by logging in to EDAboard.com. 24V control from 3.3V – I am trying to drive a load of 24V and control that line by […]
Custom and AMS IC design tools certified for Samsung 7nm process technology
Cadence Design Systems, Inc. announced that its custom and analog/mixed-signal (AMS) IC design tools have achieved certification for Samsung Foundry’s 7nm Low Power Plus (7LPP) process technology. This certification ensures Cadence and Samsung Foundry mutual customers of a highly automated circuit design, layout, signoff and verification flow with full extreme ultraviolet lithography (EUV) support. This […]
Electrical noise, Part 2: Additional perspectives
In Part 1, we looked at some facets of noise: sources, external versus internal (intrinsic) noise, and equations. Part 2 goes further into noise specifics. Q: What are some of the types of noise? A: It’s a long list. The same noise may have different names depending on the perspective of the person describing it, […]
Cache coherent interconnect for accelerators test chip will use 7-nm FinFET process technology
Xilinx, Arm, Cadence Design Systems, Inc., and TSMC announced a collaboration to build the first Cache Coherent Interconnect for Accelerators (CCIX) test chip in TSMC 7nm FinFET process technology for delivery in 2018. The test chip aims to provide a silicon proof point to demonstrate the capabilities of CCIX in enabling multi-core high-performance Arm® CPUs […]
Chip IP helps implement advanced infotainment, ADAS SoCs in 16-nm FinFET Compact technology
Cadence Design Systems, Inc. today announced it is delivering a comprehensive automotive IP portfolio for the TSMC 16nm FinFET Compact (16FFC) automotive process technology. This broad IP portfolio enables a host of applications ranging from in-vehicle infotainment, in-cabin electronics, vision subsystems, digital noise reduction and advanced driver assistance system (ADAS) subsystems and is registered in […]
Software speeds ARM Cortex-M23/M33 development
Cadence Design Systems, Inc. today announced the availability of a Cadence Rapid Adoption Kit (RAK) for the new ARM Cortex-M23 and Cortex-M33 processors targeted for the development of…
The post Software speeds ARM Cortex-M23/M33 development appeared first on Microcontroller Tips.
@eeworldonline
EE World Online
YouTube
Instagram