SiFive Inc. announced the release of SiFive Shield, a class-leading new platform security architecture. SiFive Shield is an innovative new approach to SoC design, offering a whole SoC approach to security that enables secure lifecycle management, reduces trusted computing base, and offers a clear root-of-trust. Modern SoC designs require scalable security architectures with greater isolation […]
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High-performance RISC-V cores target 5G, networking apps
SiFive announced the availability of the SiFive Core IP 7 Series, the highest performance commercially available RISC-V cores. The 7 Series product family is designed to enable embedded intelligence with features that have not been commercially available until today. The 7 Series includes the E7, S7 and the U7 series. SiFive Core IP provides a truly […]
Low-power MCU cores incorporate fast interrupt control
SiFive, a provider of commercial RISC-V processor IP, today announced the availability of its E2 Core IP Series, configurable low-area, low-power microcontroller (MCU) cores designed for use in embedded devices. The E2 Series extends SiFive’s product line with two new standard cores, the E21, which provides mainstream performance for MCUs, sensor fusion, minion cores and […]
Expansion board broadens capabilities of RISC-V development board
Microsemi Corporation announced the launch of the HiFive Unleashed Expansion Board, its latest collaboration with SiFive, the first fabless provider of customized, open-source-enabled semiconductors. Leveraging the two companies’ strategic relationship as part of Microsemi’s Mi-V RISC-V ecosystem, the new expansion board broadens the capabilities of SiFive’s HiFive Unleashed RISC-V development board, further enabling software and […]
RISC-V: an Open Instruction Set Architecture
The benefits of open source have been bestowed upon an Instruction Set Architecture (ISA) called RISC-V. One of the earliest, best-known examples of open source technology is Linux. For a widely accepted, official definition of open source, see The Open Source Initiative. Open source does not stop at Linux, however. One of the more recent […]
RISC-V, 64-bit multicore CPU for full-featured OS embedded applications
SiFive , announced the availability of U54-MC Coreplex IP, the industry’s first RISC-V based, 64-bit, quadcore real-time capable application processor with support for full-featured operating systems such as Linux. The free and open RISC-V architecture, which is supported by an ecosystem comprising more than 70 companies, has seen tremendous growth in the embedded segment. The release of […]
Debug and trace technology added to open-source RISC-V CPU platform
SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced that UltraSoC will provide debug and trace technology for the SiFive Freedom platform, based on the RISC-V open source processor specification as part of the DesignShare initiative. UltraSoC’s embedded analytics IP will be available through the recently announced SiFive DesignShare ecosystem that gives any […]
First RISC-V-based development board for Arduino platform
SiFive, the first fabless provider of customized, open-source-enabled RISC-V semiconductors, today announced the release of the Arduino Cinque, the first RISC-V-based development board for the popular open-source hardware platform. Today’s announcement marks the latest development in SiFive’s work to democratize access to custom silicon. The Arduino Cinque features SiFive’s Freedom E310, the industry’s first commercially […]
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SoC based on free and open-source RISC-V allows rapid prototyping for MCU, embedded, IoT, wearable apps
SiFive, the first fabless provider of customized, open-source-enabled semiconductors, today announced the availability of its Freedom Everywhere 310 (FE310) system on a chip (SoC), the industry’s first commercially available SoC based on the free and open RISC-V instruction set architecture, along with the corresponding low-cost HiFive1 software development board. As part of this availability, SiFive […]
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