Synopsys announced the new DesignWare ARC VPX5 DSP and VPX5FS DSP Processor IP that is based on an extended ARCv2DSP instruction set and optimized for a broad range of high-performance signal processing applications, such as RADAR/LiDAR, sensor fusion, and baseband communications processing. The new ARC VPX5 DSP processors implement a configurable, energy-efficient very long instruction word […]

Synopsys announced its DesignWare 112G Ethernet PHY IP on TSMC’s N7 process supporting true long-reach channels for up to 800G networking applications. The DesignWare 112G PHY, based on Synopsys’ silicon-proven 56G Ethernet PHY available in multiple FinFET processes, delivers PAM-4 signaling for more than 35dB channel loss across optical, copper cables, and backplane interconnects. The […]

Synopsys announced the new DesignWare ARC VPX5 DSP and VPX5FS DSP Processor IP that is based on an extended ARCv2DSP instruction set and optimized for a broad range of high-performance signal processing applications, such as RADAR/LiDAR, sensor fusion, and baseband communications processing. The new ARC VPX5 DSP processors implement a configurable, energy-efficient very long instruction word […]

Synopsys announced the Synopsys PrimeECO design closure solution, the industry’s first signoff-driven solution that achieves signoff closure with zero iterations. Signoff closure has emerged as one of the top challenges in digital design implementation, consuming up to 50 percent of the design schedule, mainly driven by rapidly increasing signoff scenarios and physical complexity at advanced […]

Synopsys announced its new native automotive solutions for more efficient system-on-chip (SoC) design. The accelerating evolution of vehicle technologies means that more automotive chips are required to satisfy higher automotive safety integrity levels (ASILs) for autonomous driving and advanced driver-assistance systems (ADAS). Synopsys’ native automotive design solutions enable designers to achieve their target ASILs by […]

Synopsys announced the industry’s first and most comprehensive unified functional safety verification solution to accelerate time to ISO 26262 certification for automotive IP and semiconductor companies targeting the highest Automotive Safety Integrity Levels (ASIL D). As part of the solution, Synopsys introduced VC Functional Safety Manager, a FMEA/FMEDA and fault classification automation technology enabling architects, […]

Synopsys announced the Synopsys PrimeECO design closure solution, the industry’s first signoff-driven solution that achieves signoff closure with zero iterations. Signoff closure has emerged as one of the top challenges in digital design implementation, consuming up to 50 percent of the design schedule, mainly driven by rapidly increasing signoff scenarios and physical complexity at advanced […]

Synopsys announced its DesignWare 112G Ethernet PHY IP on TSMC’s N7 process supporting true long-reach channels for up to 800G networking applications. The DesignWare 112G PHY, based on Synopsys’ silicon-proven 56G Ethernet PHY available in multiple FinFET processes, delivers PAM-4 signaling for more than 35dB channel loss across optical, copper cables, and backplane interconnects. The […]