by Jerome Johnston, Applications Engineer, Intersil Corp.

The buck converter switching regulator topology has evolved over the years as designers added new improvements to enhance efficiency and improve overall performance. Figure 1(a) shows an early buck converter using a diode rectifier during the off state of the main power switch. To achieve higher efficiency, designers modified the buck topology by replacing the diode with a synchronous FET (sync FET) as shown in Figure 1(b). While the sync FET improved efficiency over the diode, it introduced circuit behavior that had undesirable side effects under light load conditions. To overcome these adverse light load effects, diode emulation mode was added to enhance the sync FET design.

The purpose of this article is to explain the evolutionary steps of progression and help the power supply designer understand the benefits of diode emulation, which is found in many modern buck controllers and switching regulators.

Figure 2(a) illustrates the single transistor buck controller using a diode rectifier. When the switch is conducting, current builds up in the inductor. The amount of current is a function of the voltage across the inductor and time the switch is closed (ON time). The ratio of the time the switch is closed (ON) to the time it’s open (OFF) is used to regulate the output voltage.

When the switch is open (OFF), the current continues to flow in the inductor as shown in Figure 2(b). When the power switch is off, the diode provides the path for the inductor current. This is a practical solution when the buck regulator is used to regulate higher output voltages. But, with the need for lower output voltages and output currents increasing to higher and higher magnitudes, this has become less practical due to the diode losses. Losses were proportional to the voltage drop of the diode times the magnitude of the current during the portion of the duty cycle in which the current flowed through the diode. To improve efficiency, the standard diode was replaced with a Schottky diode featuring lower forward voltage drop (approximately 0.4 volts versus 0.7 volts), but this also has its limits.

To improve efficiency even further, the diode function was replaced with a FET switch. This FET switch is called a synchronous FET, or sync FET because it is only ON during the OFF time of the main power switch. When the buck converter is switching with nominal output load, the inductor current is always zero or greater as shown in Figure 3.

Under normal load conditions, the inductor current is always positive, flowing from the inductor’s input side to the output. The current is composed of a DC portion, but it also has an AC component known as the ripple current. When the sum of the DC and AC components’ inductor current remains positive for the entire switching period, the converter is said to be operating in continuous-conduction-mode (CCM). However, if the inductor current under light load conditions becomes negative or zero, the converter is operating in discontinuous-conduction-mode (DCM).

In the single switch buck converter, which uses a diode rectifier, the inductor current could never go negative because the diode allowed current flow in only one direction. Therefore, when the converter was under light load conditions, the current during DCM will appear as shown in Figure 4.

Figure 5 illustrates what happens when the buck converter’s diode is replaced with a sync FET and is operating under light load conditions — the current goes negative.

Unlike the standard DC/DC buck regulator with a diode rectifier, the sync FET causes the current in the inductor to flow “backwards” during DCM, stealing energy from the output filter capacitor. This behavior reduces the light-load efficiency because of the unnecessary conduction loss as the low-side MOSFET sinks the inductor current when it would be more efficient to prevent this current from flowing at all.

Many modern controllers include circuitry that avoids the DCM conduction loss by making the low-side sync FET emulate the current-blocking behavior of a diode. This smart-diode operation is called diode emulation mode (DEM) and functions to turn the sync FET off when the circuitry senses that the inductor current is starting to flow in the wrong direction. This circuitry monitors the voltage across the R_DS(ON) of the low-side sync FET and turns off the FET when adverse conditions occur.

For example, the ISL8117 high voltage buck controller [V_IN 60 V to 4.5V, V_OUT 54 V to 0.6 V, with an operating frequency of 100 kHz to 2 MHz] offers a mode option in which DEM circuitry can be enabled to enhance light load efficiency. When enabled, the DEM circuitry examines the voltage across the sync FET and activates DEM if it signals that the inductor current is going negative for eight consecutive PWM cycles while the LGATE pin is high (the SYNC FET is ON). Using detection over eight cycles prevents noise from activating DEM. If the ISL8117 enters DEM mode, the switching frequency of the controller will also decrease. Both of these actions increase efficiency by not allowing negative current flow and by reducing unnecessary gate-driver switching losses. The extent of the frequency reduction is proportional to the reduction of load current.

Figure 6 illustrates the reduced input current to the ISL8117 buck regulator circuit when DEM is enabled and when it’s not enabled. The data for Figure 6 was taken using the ISL8117 evaluation board with V_IN at 48 volts and V_OUT at 12 volts configured to support a full-scale 20A load. The DEM circuitry is used to enhance light-load efficiency.

Conclusion
If your buck regulator application requires excellent light-load efficiency, you’ll want to consider the selection of a controller or regulator that offers DEM. Avoiding DCM conduction loss and reducing unnecessary gate-driver switching losses will help your next power supply design meet its performance specification targets.

About the author:
Jerome Johnston is an Applications Engineer with Intersil Corporation’s Central Applications team. He has more than 30 years of analog system design and applications experience, and is the recipient of 13 U.S. patents. Jerome received his BSEE from the University of Nebraska.