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Protocol analysis system for PCIe 5.0 hosts 16 lanes

September 29, 2020 By Lee Teschler

The first 16-lane protocol analysis system for PCI Express 5.0 operates at 32 Gbps per lane. The VIAVI Xgig 5P16 Protocol Analyzer delivers detailed traffic analysis and jamming capabilities, enabling test and validation to meet the most demanding performance needs of emerging compute-intensive applications such as 400 Gigabit Ethernet, artificial intelligence (AI), IoT and hyperscale computing.

The Xgig 5P16 includes a system chassis platform, an interposer for device under test (DUT) connectivity, and Xgigthe analyzer license key. With a tightly coupled, yet modular architecture, component manufacturers can perform the tests they need today in accordance with the PCIe 5.0 standard, as well as all previous revisions of PCI Express, while allowing for upgrades to enhanced capabilities in the future.

The Xgig 5P16 chassis has 256GB of memory and flexible allocation to capture and save multiple data traces at all layers of the stack. A familiar Xgig management interface helps minimize training needs and startup costs. The sophisticated auto-tuning of signal integrity with the DUT makes for quick test bench setup and ensures a quality, repeatable capture to reduce issue resolution time.

“In today’s demanding, multiprotocol environments, component manufacturers need trusted technology and familiar user interfaces to streamline data traffic analysis and validation as they develop tomorrow’s high-performance networking equipment,” said Tom Fawcett, Vice President and General Manager, Lab and Production Business Unit, VIAVI. “VIAVI has delivered the first 16-lane protocol analysis system with native support for PCIe 5.0 to enable equipment manufacturers to keep pace with the ever-increasing demands of bandwidth-intensive computing.”

 

Filed Under: Applications, Artificial intelligence, IoT, Telecommunications, Test and Measurement Tips Tagged With: viavisolutions

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