The technology features like over-the-air (OTA) software updates and data management are reinventing the hardware of today for the software of tomorrow. And if there is a single most prominent component at this technology crossroads, it’s the microcontroller.
Moreover, the growing popularity of OTA functions is most visible in automotive environments where they wirelessly and automatically update the electronic control unit (ECU) software. The vehicle powertrain, body, chassis, and infotainment systems, sprinkled with MCUs, are increasingly being defined by software. And here, one of the most cost-effective methods for regular updates is OTA. Automotive cockpit systems, for instance, can update data and code while still in execution mode.
Figure 1: The block diagram of an MCU-based OTA architecture. (Image: Analog Devices, Inc.)
So, what matters the most for MCUs serving the OTA software updates and other data management services in automotive designs? The simple answer is on-chip memory. The OTA-ready MCUs demand larger on-chip memory for generous storage of updated programs and support for a variety of peripherals such as I2C, SPI, and UART.
More flash for OTA
Earlier, OTA updates were performed on two flash memory devices: One for writing and the other for reading. Now the larger embedded flash memory capacities in MCUs facilitate multiple bank architectures for simultaneous read-while-write operations. That significantly reduces the downtime during software switching. Furthermore, it bolsters efficiency by maintaining normal operations while OTA updates are performed in the background.
There are two types of memory that MCUs typically employ for OTA updates. First, non-volatile memory such as flash used to store the program code and read-only data of an application. Second, volatile memory like SRAM is used to store modifiable portions of the software application like the stacks.
A combination of flash and SRAM can facilitate multiple and complex software applications without requiring external serial flash. Flash memory is key to enabling high-performance OTA updates for its ability to separate read and write parts of the OTA software. Likewise, SRAM plays a critical role in the transport of OTA data in the binary format during the download procedure.
Figure 2: The segregation of tasks between flash and SRAM memory parts in an OTA setup. (Image: Analog Devices, Inc.)
OTA security and reliability
Another important consideration for the OTA-ready MCUs is security, and subsequently, the need for reliable performance in extreme conditions. The MCUs offering the OTA services must feature better control functions and capabilities, but security is also critical in supporting safe and rapid OTA updates of ECU software.
Microcontrollers receive new firmware images for updating MCU’s underlying hardware capabilities as well as for applications running on top of MCUs. That poses security concerns, and as a result, the OTA-ready MCUs are incorporating functional safety and other security features such as cryptographic accelerators.
It’s important to note that the above design information is also valid for OTA updates serving the IoT, wireless sensor nets, and other non-automotive applications. More about that in another session, so stay tuned for part two.
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