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Embedded multimediacard PHY now runs o 22-nm IC IP

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Arasan Chip Systems expands its IP offering for TSMC’s industry-leading 22nm process technology with the immediate availability of its eMMC PHY IP for SoC Designs on the TSMC 22nm process. The eMMC PHY IP on TSMC 22nm process is seamlessly integrated with Arasan’s eMMC 5.1 Host Controller IP and Software thereby providing customers a Total […]

SBCs boast 4K graphics for handling eDP, HDMI, MIPI displays

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New Yorker Electronics has introduced the newest line in the Novasom Industries M Series of CPU, the M9. The Novasom M9 joins the well-established M7 and M7Plus Single Board Computers (SBC). Based on the prestigious Rockchip 3399, this CPU offers the new Cortex A72’s performance and the multicore Quad A53. This is used to speed-up […]

Flash programmer gets quad-mode capability for QSPI flashes

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SEGGER adds quad mode programming for QSPI Flashes to its universal flash programmer, maximizing programming speed for production environments. Flasher PRO ensures that the time gained using 4-pin transfer translates directly to increased productivity. Operating in either PC-based or stand-alone mode, the Flasher PRO reaches the theoretical minimum programming time of the QSPI device itself. […]

Selecting the right M.2-format NVMe SSD

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How the NVMe solid state disk protocol evolved A consortium of vendors, including Intel, Samsung, SanDisk, Dell, and Seagate, developed Non-Volatile Memory Express (NVMe) as a communication interface/protocol specifically for solid-state drives (SSDs). The specification defines a register interface, command set, and features for PCI Express (PCIe)-based SSDs to facilitate high performance and interoperability across […]

J-Link Remote Servers speed embedded system debugging

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SEGGER announces that it now operates a worldwide network of J-Link Remote Servers, enabling a user to debug target systems from anywhere in the world at even higher speeds than before. The J-Link Remote Servers are available to every J-Link user at no cost. While using the closest server significantly increases communication speed, customers still […]

RISC-V build tools support Linux-based frameworks for automated build/test processes

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IAR Systems releases an update of its RISC-V build tools supporting implementation in Linux-based frameworks for automated application build and test processes. This addition further extends IAR Systems’ offering for flexible automated workflows, enabling streamlined workflows from the developer environment to Continuous Integration (CI). Thanks to the tools including the static code analysis tool C-STAT, […]

RISC-V for ultra-low power processing and AI on the edge

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RISC-V is an exciting and rapidly-emerging technology. RISC-V is software; it is an open standard instruction set architecture (ISA) based on established reduced instruction set computer (RISC) principles. So far, this FAQ series has looked at how “RISC-V is growing and offers stability, scalability, and security,” the “Growing availability of tools reducing the risk of […]

RISC-V development tools add trace functions, new compiler optimizations

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IAR Systems has extended the complete development toolchain IAR Embedded Workbench for RISC-V with additional trace functionality and new compiler optimizations. Building on existing support for a range of MCUs and FPGAs from several vendors, the latest version 1.40 introduces support for Nuclei System Technology devices. In addition, this new version includes enhanced implementation of […]