Mentor, a Siemens business, today announced ARM® Cortex®-M4 processor support from the Mentor® Embedded Nucleus® SafetyCert real time operating system (RTOS), targeting high-performance, next-generation safety-critical systems for industrial, medical, automotive and airborne markets. Combining high performance, low power, and cost-efficiency, the ARM Cortex-M4 processor is ideal for a diverse array of vertical market segments, including those facing strict safety requirements. The Nucleus SafetyCert RTOS is a cost-effective, safety-certified solution that includes a version of the Nucleus RTOS together with a process model that supports space partitioning, run-time libraries, connectivity, TCP/IP networking, data storage and the Sourcery™ CodeBench integrated development environment (IDE). The Nucleus SafetyCert RTOS has been verified and documented to meet the most stringent safety requirements for applications based on the ARM Cortex-M4 processor, including IEC 61508 SIL 3, IEC 62304 Class C, RTCA DO-178C Level A, and ISO 26262 ASIL D.
Today’s system-on-chip (SoC) architectures include a variety of cores that can range from high-end application processors to digital signal processors (DSPs) and micro-controller units (MCUs) in a single package. The task of consolidating safety systems into a single SoC is challenging for many developers as they deal with the complexity and cost associated with executing a different OS on each core. The Nucleus SafetyCert RTOS provides a highly configurable, single platform designed to execute across the range of cores on modern SoCs, while supporting rapid product development and cost-efficiency. With support for the major U.S. and international safety standards for industrial, medical, automotive and airborne systems, risk associated with successful navigation through regulatory approval is reduced with the Nucleus SafetyCert technology.
“Meeting the requirements for leading ADAS applications can rely on a highly optimized device running an RTOS engineered with functional safety systems in mind,” stated Marcus Cooksey, ADAS Ecosystem Manager, Texas Instruments. “The scalability and performance of Nucleus SafetyCert provide developers with an RTOS platform that meets multiple safety standards and can be deployed on a variety of cores on the TDA3/2 SoCs.”
The need for highly reliable software in safety-critical devices places greater demands on developers as software complexity increases. To help address this challenge, the Nucleus SafetyCert RTOS includes a safety-certified process model for memory partitioning on ARM Cortex-M4-based MCUs. Utilizing the memory protection unit on the ARM Cortex-M4 processor, the Nucleus SafetyCert RTOS partitions memory to isolate software subsystems into separate space domains, which serve as protected regions to contain and isolate faults to a subsystem’s respective memory. The partitions serve to isolate safety critical code from non-safety subsystems for mixed safety-critical designs.
“Today’s heterogeneous SoCs are designed for consolidating complex safety systems onto a single platform,” stated Scot Morrison, general manager, Platforms Business Unit, Mentor Graphics Embedded Systems Division. “Mentor’s Nucleus SafetyCert RTOS is the ideal choice for overcoming design challenges and software complexity associated with SoCs requiring a different OS for each core.”
The Nucleus SafetyCert RTOS comes with a board support package (BSP) for market-leading SoCs including the Texas Instruments (TI) TDA3 SoC for Advanced Driver Assistance Systems. This release of the Nucleus SafetyCert product also includes an IPv4 TCP/IP certified stack and other connectivity.
The post RTOS meets stringent safety requirements of ARM Cortex-M4-based applications appeared first on Microcontroller Tips.