UltraSoC today announced UltraDevelop 2, a complete integrated development environment (IDE) that combines comprehensive debug, run control, and performance tuning with advanced visualization and data science capabilities for system-on-chip (SoC) development teams. Incorporating technology from UltraSoC partners Imperas and Percepio, UltraDevelop 2 provides actionable insights to dramatically cut development costs, shorten time-to-revenue and improve product quality.
The new UltraDevelop suite delivers a holistic, system-level approach to SoC development and debug, allowing engineers to view and analyze the interlinked behavior of hardware, firmware and software at any level of abstraction – and to interactively switch between views and tools depending on the task at hand. UltraSoC’s newly developed data science extensions offer advanced capabilities such as anomaly detection, heat mapping and root cause analysis. Visualization capabilities based on Percepio’s Tracealyzer provide engineers with an integrated view of the operation of hardware and high-level software execution. The inclusion of Imperas’ MPD debugger enables support for today’s multi-core, multi-threaded platforms, including devices that combine cores based on different CPU architectures into complex heterogeneous systems.
Based on the industry-standard Eclipse platform, UltraDevelop 2 provides an integrated view that encompasses single step and breakpoint code execution status for multiple processors; instruction trace; and real-time, protocol-aware monitoring of hardware structures within the SoC. Engineers can simultaneously view the behavior of hardware structures such as memory controllers and interconnects / NoCs, and the execution of software, all across a number of different cores, even with different architectures. Designers working on simpler single-core debug tasks can access the same integrated debug capabilities, while utilizing the open-source GDB debugger.
UltraDevelop 2 is architected to give SoC designers an optimal blend of functionality and flexibility in their choice of development platform. The tools include a library of debug adapters to enable real-time run control of more than 20 processor core architectures from multiple vendors, including Arm, MIPS and RISC-V (as implemented by Andes, Esperanto and SiFive), amongst others. Within the unified Eclipse environment, teams can choose to deploy third-party tools from existing UltraSoC partners such as Lauterbach, with support for the underlying UltraSoC hardware capabilities; or they can opt for a pre-integrated configuration supplied by UltraSoC.
UltraSoC’s vendor-independent, system-level approach to hardware/software debug is significantly enhanced by the addition of new analytics and data science capabilities. UltraDevelop 2 is supplied with a suite of modules that facilitate detailed big data analysis of on-chip behavior, including anomaly detection, heat mapping and root cause analysis. These include example applications and configurations for functional safety (for example the stringent verification and validation mandated by ISO26262 and other standards); cybersecurity (detecting vulnerabilities or unwanted interactions); and performance optimization (for example identifying inefficiencies in multi-threading software stacks, and hard-to-find states that lead to “long-tail” bugs in high-performance computing environments).
UltraDevelop 2 users can extend these capabilities, customize the framework and configure test systems via a range of scripted (Python) modules that give direct access to the data provided by UltraSoC on-chip monitors. These also provide configuration options and higher-level functionality such as terminal services.
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