• Skip to primary navigation
  • Skip to main content
  • Skip to primary sidebar
  • Skip to footer

Electrical Engineering News and Products

Electronics Engineering Resources, Articles, Forums, Tear Down Videos and Technical Electronics How-To's

  • Products / Components
    • Analog ICs
    • Battery Power
    • Connectors
    • Microcontrollers
    • Power Electronics
    • Sensors
    • Test and Measurement
    • Wire / Cable
  • Applications
    • 5G
    • Automotive/Transportation
    • EV Engineering
    • Industrial
    • IoT
    • Medical
    • Telecommunications
    • Wearables
    • Wireless
  • Learn
    • eBooks / Handbooks
    • EE Training Days
    • Tutorials
    • Learning Center
    • Tech Toolboxes
    • Webinars & Digital Events
  • Resources
    • White Papers
    • Design Guide Library
    • Digital Issues
    • Engineering Diversity & Inclusion
    • LEAP Awards
    • Podcasts
    • DesignFast
  • Videos
    • EE Videos and Interviews
    • Teardown Videos
  • EE Forums
    • EDABoard.com
    • Electro-Tech-Online.com
  • Bill’s Blogs
  • Advertise
  • Subscribe

Practical points for Analog-to-Digital converters

October 17, 2017 By Mike Parks Leave a Comment

Confusion often arises around the topic of criteria for picking analog-to-digital converters (ADC). Much discussion is usually given to the sampling rate (also referred to as the conversion rate) which dictates how frequently the source signal must be sampled per second to faithfully reproduce that signal. Twentieth-century electronic communications engineer Harry Nyquist answered that question with the Nyquist rate. The Nyquist rate dictates that any given signal must be sampled at a minimum of twice its maximum component frequency. If not, any component signals above the sampling rate could possibly suffer from aliasing. In other words, higher frequency components could be misinterpreted as a lower frequency signal. Running a signal through a low pass filter tuned to at least one-half of the ADC sampling rate will help to eliminate aliasing concerns.

For simple sine waves, this notion is straightforward to visualize. For complex waveforms made up of multiple sine waves, a spectrum analyzer or an oscilloscope with Fast Fourier Transform (FFT) functionality would be needed to discern the various frequency components. We measure the sampling rate in samples per second (sps), or ksps (thousands of samples per second) of Msps (millions of samples per second).

analog-to-digital converters

Fig 1a (Top) 5Vpp would have a resolution of ~4.9mV per step. Fig 1b (Bottom) Viewing a 1MHz source signal in the frequency domain can help to visualize the discrete frequency components of complex signals.

Many discussions on ADCs end at this point, but another major factor for analog conversion is the sampling depth. The sampling depth impacts the precision of measuring the voltage level during any given sample or the resolution at which we can look at the amplitude of the source signal. The amount we can quantize an analog signal is given by equation 2n, meaning a signal can be broken into 2n discrete levels. For a 10-bit ADC, there are 210 or 1024 discrete values that we can discern from a given source signal, and we can calculate the resolution from the equation:

Q = [ VPeakHigh – VPeakLow ] / 2n

Using the same 10-bit example from before, if we are sampling a 0V to 5V signal than the smallest change in signal we can detect is [5V – 0V] / 1024, which is approximately 2.5mV. Of course, this is academic and in the real-world, resolution is limited by noise and other sources of distortion, which causes SINAD or Signal-to-Noise and Distortion Ratio. Practically speaking, there is an effective limit on the resolution. If the datasheet of the ADC gives the SNR (Signal-to-Noise Ratio) of the device, then it is possible to calculate the Effective Number of Bits (ENOB) using the formula:

ENOB = [SNR(dB) – 1.76dB ] / 6.02dB

One final aspect of ADCs that should be considered is called step recovery. Put simply; step recovery dictates how fast the output of an ADC can respond to a change in the input. This has more to do with the topology of the ADC design and can vary greatly from one type of ADC to the next.

Practically speaking, the variety of families of ADCs each have their strengths and weaknesses that must be considered from an application specific perspective. Designers must also consider interface technologies (e.g., I2C, SPI, etc.) and power versus speed. Some general rules of thumb are:

Successive Approximation Register:  For medium to high-speed applications (100s ksps to a few MSPs) and shallow sampling depths (less than 16-bits);

Delta-Sigma: For medium speed high applications (measured in 100s ksps to low Msps) and deeper sampling depths (16-bits or greater);

Slope Integrating (single, dual, quad-slope): Good for low-speed applications (10s to 100s samples per second); and

Flash or Direct Conversion: For very high-speed applications that are measured in 100s of Msps.

You Might Also Like

Filed Under: Analog IC Tips, Analog ICs, FAQ, Featured Tagged With: basics, FAQ

Reader Interactions

Leave a Reply Cancel reply

You must be logged in to post a comment.

This site uses Akismet to reduce spam. Learn how your comment data is processed.

Primary Sidebar

EE Engineering Training Days

engineering

Featured Contributions

Five challenges for developing next-generation ADAS and autonomous vehicles

Robust design for Variable Frequency Drives and starters

Meeting demand for hidden wearables via Schottky rectifiers

GaN reliability milestones break through the silicon ceiling

From extreme to mainstream: how industrial connectors are evolving to meet today’s harsh demands

More Featured Contributions

EE Tech Toolbox

“ee
Tech Toolbox: Internet of Things
Explore practical strategies for minimizing attack surfaces, managing memory efficiently, and securing firmware. Download now to ensure your IoT implementations remain secure, efficient, and future-ready.

EE Learning Center

EE Learning Center
“ee
EXPAND YOUR KNOWLEDGE AND STAY CONNECTED
Get the latest info on technologies, tools and strategies for EE professionals.
“bills

R&D World Podcasts

R&D 100 Episode 10
See More >

Sponsored Content

Advanced Embedded Systems Debug with Jitter and Real-Time Eye Analysis

Connectors Enabling the Evolution of AR/VR/MR Devices

Award-Winning Thermal Management for 5G Designs

Making Rugged and Reliable Connections

Omron’s systematic approach to a better PCB connector

Looking for an Excellent Resource on RF & Microwave Power Measurements? Read This eBook

More Sponsored Content >>

RSS Current EDABoard.com discussions

  • High Side current sensing
  • Xiaomi Mijia 1C Robot problem of going backwards while working
  • Multiple DC/DC converters and a single input source
  • Will this TL084C based current clamp circuit work?
  • Cadence LVS bug I do not understand on 12T XOR gate

RSS Current Electro-Tech-Online.com Discussions

  • Curved lines in PCB design
  • using a RTC in SF basic
  • Parts required for a personal project
  • Wideband matching an electrically short bowtie antenna; 50 ohm, 434 MHz
  • PIC KIT 3 not able to program dsPIC
Search Millions of Parts from Thousands of Suppliers.

Search Now!
design fast globle

Footer

EE World Online

EE WORLD ONLINE NETWORK

  • 5G Technology World
  • Analog IC Tips
  • Battery Power Tips
  • Connector Tips
  • DesignFast
  • EDABoard Forums
  • Electro-Tech-Online Forums
  • Engineer's Garage
  • EV Engineering
  • Microcontroller Tips
  • Power Electronic Tips
  • Sensor Tips
  • Test and Measurement Tips

EE WORLD ONLINE

  • Subscribe to our newsletter
  • Teardown Videos
  • Advertise with us
  • Contact us
  • About Us

Copyright © 2025 · WTWH Media LLC and its licensors. All rights reserved.
The material on this site may not be reproduced, distributed, transmitted, cached or otherwise used, except with the prior written permission of WTWH Media.

Privacy Policy