DesignCon video: Why details cause project failure

“Twenty-five percent of projects reach market on time and on budget,” said Andrea Fox of Mentor Graphics to a gathering at DesignCon 2020. The rest need more time, more money, or, in the case of 17 percent, are simply scrapped. Why?

When designing a board, you may face having to use different design tools for modeling and simulation. In Mentor’s pitch to engineers on the exhibit floor, Fox said that small details shcu as trace, via, and component locations can slip through and cause delays and overruns. Fox demonstrated how Mentor’s HyperLynx software provides a consistent and automated way to check design rules, applying them “consistently and repeatably.”

Hyperlynx lets you find problems such as discontinuities in PCB design for high-speed digital buses such as DDRx, PCIe, and Ethernet. It also lets you check designs for power-distribution networks (PDNs). In the video, Fox explains how you can use Hyperlynx to find an analyze issues such as locations of capacitors, calculating parameters that include loop inductance, resistance, and impedance.